Efficient DC Fault Simulation of Nonlinear Analog Circuits

13 years 10 months ago

Download www.ee.washington.edu

Efficient dc fault simulation of nonlinear analog circuits is addressed in this paper. Two techniques, one-step relaxation and adaptive simulation continuation, are proposed. By one-step relaxation, only one Newton

Michael W. Tian, C.-J. Richard Shi

Real-time Traffic

Adaptive Simulation Continuation | DATE 1998 | Dc Fault Simulation | Hardware | One-step Relaxation |

claim paper

» Multitone Testing of Linear and Nonlinear Analog Circuits Using Polynomial Coefficients

» Efficient analog circuit synthesis with simultaneous yield and robustness optimization

» Analog circuit simulation using range arithmetics

» A Test Design Method for Floating Gate Defects FGD in Analog Integrated Circuits

» First steps towards SATbased formal analog verification

» Timedomain analysis methodology for largescale RLC circuits and its applications

» Partial SimulationDriven ATPG for Detection and Diagnosis of Faults in Analog Circuits

» Hardware Evolution of Analog Circuits for Insitu Robotic FaultRecovery

Post Info
More Details (n/a)

Added	04 Aug 2010
Updated	04 Aug 2010
Type	Conference
Year	1998
Where	DATE
Authors	Michael W. Tian, C.-J. Richard Shi

Comments (0)

Sciweavers

Efficient DC Fault Simulation of Nonlinear Analog Circuits

Adaptive Simulation Continuation | DATE 1998 | Dc Fault Simulation | Hardware | One-step Relaxation |

Explore & Download

Productivity Tools

Document Tools

Image Tools

Sciweavers