Using Transfer-Resource Graph for Software-Based Verification of System-on-Chip

The verification of a system-on-chip is challenging due to its high level of integration. Multiple components in a system can behave concurrently and compete for resources. Hence, for simulation-based verification, we need a methodology that allows automatic generation of test-cases for testing concurrent and resource-competing behaviors. We introduce the use of transfer-resource graph (TRG) as the model for eration. From a high abstraction level, TRG is able to model the parallelism between heterogeneous interaction forms in a system. We show how TRG is used in generating test-cases of resource-competitions and how these test-cases are structured in event-driven test-programs. For coverage, TRG can be converted to a Petri-net, allowing the measurement of completeness of concurrency in simulation.

• Type: Journal
• Year: 2008
• Where: TCAD
• Authors: Xiaoxi Xu, Cheng-Chew Lim
• Keywords: Heterogeneous Interaction Forms, Multiple Components, Simulation-based Verification, TCAD 2008