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ICES
2003
Springer
151views Hardware» more  ICES 2003»
13 years 11 months ago
Using Genetic Programming and High Level Synthesis to Design Optimized Datapath
This paper presents a methodology to design optimized electronic systems from high abstraction level descriptions. The methodology uses Genetic Programming in addition to high-leve...
Sérgio G. Araújo, Antônio C. M...
ASPDAC
1995
ACM
127views Hardware» more  ASPDAC 1995»
13 years 9 months ago
Reclocking for high-level synthesis
In this paper we describe, a powerful post-synthesis approach called reclocking, for performance improvement by minimizing the total execution time. By back annotating the wire del...
Pradip K. Jha, Nikil D. Dutt, Sri Parameswaran
FPGA
2008
ACM
174views FPGA» more  FPGA 2008»
13 years 7 months ago
Pattern-based behavior synthesis for FPGA resource reduction
Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...
Jason Cong, Wei Jiang