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ispd 1997
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ISPD
1997
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Physical design: mathematical models and methods
13 years 10 months ago
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T. C. Hu
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ISPD
1997
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Slicibility of rectangular graphs and floorplan optimization
13 years 10 months ago
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www.cecs.uci.edu
Parthasarathi Dasgupta, Susmita Sur-Kolay
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ISPD
1997
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78
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C5M - a control logic layout synthesis system for high-performance microprocessors
13 years 10 months ago
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Jeffrey L. Burns, Jack A. Feldman
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ISPD
1997
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75
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Preserving HDL synthesis hierarchy for cell placement
13 years 10 months ago
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Yu-Wen Tsay, Wen-Jong Fang, Allen C.-H. Wu, Youn-L...
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1997
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Closed form solution to simultaneous buffer insertion/sizing and wire sizing
13 years 10 months ago
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In this paper, we consider the delay minimization problem of a wire by simultaneously considering bu er insertion, bu er sizing and wire sizing. We consider three versions of the ...
Chris C. N. Chu, D. F. Wong
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