A 155 Mbps Triple-DES Network Encryptor

The presented Triple-DES encryptor is a single-chip solution to encrypt network communication. It is optimized for throughput and fast switching between virtual connections like found in ATM networks. A broad range of optimization techniques were applied to reach encryption rates above 155 Mbps even for Triple-DES encryption in outer CBC mode. A high-speed logic style and full-custom design methodology made first-time working silicon on a standard 0.6 µm CMOS process possible. Correct functionality of the prototype was verified up to a clock rate of 275 MHz. Keywords. Network security, encryption, DES algorithm, Triple-DES, cipher block chaining, pipelining, true single-phase logic, full-custom design.

• Type: Conference
• Year: 2000
• Where: CHES
• Authors: Herbert Leitold, Wolfgang Mayerwieser, Udo Payer, Karl C. Posch, Reinhard Posch, Johannes Wolkerstorfer
• Keywords: CHES 2000, Cryptology, Presented Triple-des Encryptor, Triple-DES, Triple-DES Encryption