Abstract—Low-power, single-chip integrated systems are prevailing in remote applications due to the increasing power and delay cost of inter-chip communication compared to on-chip computation. This paper describes the design and measured performance of a fully-functional digital core with a low-jitter, monolithic, MEMS-LC clock reference. This chip has been fabricated in TSMC’s 0.18µm MM/RF bulk CMOS process. Maximum power consumption of the complete microsystem is
Robert M. Senger, Eric D. Marsman, Michael S. McCo