—This paper presents a 2GHz 8-bit CMOS ROM-less direct digital frequency synthesizer (DDFS). Nonlinear current steering digital to analog converter (DAC) has been utilized to convert phase word to sine wave amplitude directly without area consuming Rom for sine look-up table, which is the speed bottleneck of the DDFS circuit. In order to achieve high speed performance and low power dissipation, CMOS current mode logic (CML) is chose to implement the logic cells. A semisymmetrical switching scheme of current source matrix of the nonlinear DAC is proposed to compensate the systematic and gradient errors introduced by the processing and environment variations. The DDFS chip is implemented in Chartered
Xuefeng Yu, Foster F. Dai, Yin Shi, Ronghua Zhu