Accelerating Multiprocessor Simulation with a Memory Timestamp Record

We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestamp record (MTR). The MTR is a versatile, compressed snapshot of memory reference patterns which can be rapidly updated during fast-forwarded simulation, or stored as part of a checkpoint. We evaluate MTR using a full-system simulation of a directory-based cachecoherent multiprocessor running a range of multithreaded workloads. Both MTR and a multiprocessor version of functional fast-forwarding (FFW) make similar performance estimates, usually within 15% of our detailed model. In addi

• Type: Conference
• Year: 2005
• Where: ISPASS
• Authors: Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste Asanovic
• Keywords: Directory-based Cachecoherent Multiprocessor, ISPASS 2005, Memory Reference Patterns, Memory Timestamp Record, Software Engineering