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2000
Springer

An Adaptive Issue Queue for Reduced Power at High Performance

14 years 2 months ago
An Adaptive Issue Queue for Reduced Power at High Performance
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue queue for a superscalar processor that leverages transmission gate insertion to provide dynamic low-cost configurability of size and speed. A novel circuit structure dynamically gathers statistics of issue queue activity over intervals of instruction execution. These statistics are then used to change the size of an issue queue organization onthe-fly to improve issue queue energy and performance. When applied to a fixed, full-size issue queue structure, the result is up to a 70% reduction in energy dissipation. The complexity of the additional circuitry to achieve this result is almost negligible. Furthermore, self-timed techniques embedded in the adaptive scheme can provide a 56% decrease in cycle time of the issue queue when we change the adaptive issue queue size from 32 entries (largest possible) to 8 ent...
Alper Buyuktosunoglu, Stanley Schuster, David Broo
Added 25 Aug 2010
Updated 25 Aug 2010
Type Conference
Year 2000
Where PACS
Authors Alper Buyuktosunoglu, Stanley Schuster, David Brooks, Pradip Bose, Peter W. Cook, David H. Albonesi
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