Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores

For motion estimation (ME) and discrete cosine transform (DCT) of MPEG video encoding, content variation and perceptual tolerance in video signals can be exploited to gracefully trade quality for low power. As a result, power-aware hardware cores have been proposed for these video encoding subsystems. Adaptive System-on-a-Chip, aSoC, supports power-aware cores by providing an on-chip communications framework designed to promote scalability and flexibility in system-on-a-chip designs. This paper describes aSoC's ability to dynamically control voltage and frequency scaling through a simple voltage and frequency selection scheme. A small demonstration system is tested and shows up to 90% reduction in core power when the aSoC voltage scaling features are enabled.

• Type: Conference
• Year: 2003
• Where: ICIP
• Authors: Andrew Laffely, Jian Liang, Russell Tessier, Wayne Burleson
• Keywords: Adaptive System-on-a-Chip, Frequency Selection Scheme, ICIP 2003, Image Processing, Simple Voltage, Video Encoding Subsystems, Voltage Scaling Features