The Agree Predictor: A Mechanism for Reducing Negative Branch History Interference

Deeply pipelined, superscalar processors require accurate branch prediction to achieve high performance. Two-level branch predictors have been shown to achieve high prediction accuracy. It has also been shown that branch interference is a major contributor to the number of branches mispredicted by two-level predictors. This paper presents a new method to reduce the interference problem called agree prediction, which reduces the chance that two branches aliasing the same PHT entry will interfere negatively. We evaluate the performance of this scheme using full traces (both user and supervisor) of the SPECint95 benchmarks. The result is a reduction in the misprediction rate of gcc ranging from 8.62% with a 64K{ entry PHT up to 33.3% with a 1K{entry PHT.

• Type: Conference
• Year: 1997
• Where: ISCA
• Authors: Eric Sprangle, Robert S. Chappell, Mitch Alsup, Yale N. Patt
• Keywords: Accurate Branch Prediction, Hardware, ISCA 1997, Two-level Branch Predictors, Two-level Predictors