Vector extensions for general purpose processors are an efficient feature to address the growing performance demand of multimedia and computer vision applications. Embedded processors are the most widespread architectures for such applications. While providing sufficient computing power for these applications, they must take into account power, area and real-time constraints. In this paper, we propose two hardware optimization techniques to address those constraints: RISCization and instruction set customization. Experimental results show that those techniques both reduce time and power consumption by up to 50% when compared to the original ISA. Keywords SIMD instruction set; altivec ; vectorization; embedded systems;processor;customization; high performance image processing; powerefficient architectures