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ISCAS
2005
IEEE

. Analog slice turbo decoding

14 years 6 months ago
. Analog slice turbo decoding
— This paper presents the design of an analog turbo decoder for DVB-RCS-like applications using a slice architecture. The constituent decoders for different frame lengths are made up of duplicated elements chosen from a small set of reducedsize MAP decoders. This slicing technique enhances the design of the decoder in terms of simplicity, testability, re-usability and robustness. It is illustrated with the example of a turbo decoder for frames of 48 symbols sliced into two sub-frames. The error correction performance of this analog slice decoder is equal to that of the digital counterpart without slices. Transistor-level
Matthieu Arzel, Cyril Lahuec, Fabrice Seguin, Davi
Added 25 Jun 2010
Updated 25 Jun 2010
Type Conference
Year 2005
Where ISCAS
Authors Matthieu Arzel, Cyril Lahuec, Fabrice Seguin, David Gnaedig, Michel Jézéquel
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