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    Springer
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    Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces

    14 years 6 months ago
    Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces
    Download  www.async.ece.utah.edu
    Scott Little, David Walter, Kevin Jones, Chris J.
    claim paper
    Added 07 Jun 2010
    Updated 07 Jun 2010
    Type Conference
    Year 2007
    Where ATVA
    Authors Scott Little, David Walter, Kevin Jones, Chris J. Myers
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