Analysis of redundancy and application balance in the SPEC CPU2006 benchmark suite

The recently released SPEC CPU2006 benchmark suite is expected to be used by computer designers and computer architecture researchers for pre-silicon early design analysis. Partial use of benchmark suites by researchers, due to simulation time constraints, compiler difficulties, or library or system call issues is likely to happen; but a random subset can lead to misleading results. This paper analyzes the SPEC CPU2006 benchmarks using performance counter based experimentation from several state of the art systems, and uses statistical techniques such as principal component analysis and clustering to draw inferences on the similarity of the benchmarks and the redundancy in the suite and arrive at meaningful subsets. The SPEC CPU2006 benchmark suite contains several programs from areas such as artificial intelligence and includes none from the electronic design automation (EDA) application area. Hence there is a concern on the application balance in the suite. An analysis from the pers...

• Type: Conference
• Year: 2007
• Where: ISCA
• Authors: Aashish Phansalkar, Ajay Joshi, Lizy Kurian John
• Keywords: Benchmark Suite, Early Design Analysis, Hardware, ISCA 2007, Spec Cpu2006 Benchmark