An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors

Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism ILP techniques that are traditionally used in high performance systems. Predicated execution, an important ILP technique, can be used to improve branch handling, reduce frequently mispredicted branches, and expose multiple execution paths to hardware resources. However, there is a major tradeo in the design of the instruction set, the addition of a predicate operand for all instructions. We propose a new architecture framework for introducing predicated execution to embedded designs. Experimental results show a 10 performance improvement and a code reduction of 25 over a traditionally predicated architecture.

• Type: Conference
• Year: 1999
• Where: EUROPAR
• Authors: Daniel A. Connors, Jean-Michel Puiatti, David I. August, Kevin M. Crozier, Wen-mei W. Hwu
• Keywords: Distributed And Parallel Computing, EUROPAR 1999, Important Ilp Technique, Multiple Execution Paths, Parallelism ILP Techniques