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    Automated Synthesis of Micro-Pipelines from Behavioral Verilog HDL

    14 years 4 months ago
    Automated Synthesis of Micro-Pipelines from Behavioral Verilog HDL
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    Ivan Blunno, Luciano Lavagno
    claim paper
    Added 30 Jul 2010
    Updated 30 Jul 2010
    Type Conference
    Year 2000
    Where ASYNC
    Authors Ivan Blunno, Luciano Lavagno
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