Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
Sci2ools
International Keyboard
Graphical Social Symbols
CSS3 Style Generator
OCR
Web Page to Image
Web Page to PDF
Merge PDF
Split PDF
Latex Equation Editor
Extract Images from PDF
Convert JPEG to PS
Convert Latex to Word
Convert Word to PDF
Image Converter
PDF Converter
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
Free Online Productivity Tools
i2Speak
i2Symbol
i2OCR
iTex2Img
iWeb2Print
iWeb2Shot
i2Type
iPdf2Split
iPdf2Merge
i2Bopomofo
i2Arabic
i2Style
i2Image
i2PDF
iLatex2Rtf
Sci2ools
14
click to vote
ASPDAC
2008
ACM
favorite
Email
discuss
report
106
views
Hardware
»
more
ASPDAC 2008
»
Behavioral synthesis with activating unused flip-flops for reducing glitch power in FPGA
13 years 10 months ago
Download
www.aspdac.com
Cheng-Tao Hsieh, Jason Cong, Zhiru Zhang, Shih-Chi
Real-time Traffic
ASPDAC 2008
|
Hardware
|
claim paper
Related Content
»
FPGA power reduction by guarded evaluation
more »
Post Info
More Details (n/a)
Added
12 Oct 2010
Updated
12 Oct 2010
Type
Conference
Year
2008
Where
ASPDAC
Authors
Cheng-Tao Hsieh, Jason Cong, Zhiru Zhang, Shih-Chieh Chang
Comments
(0)
Researcher Info
Hardware Study Group
Computer Vision