Bouncing Threads: Merging a New Execution Model into a Nanotechnology Memory

The need for small, high speed, low power computers as the end of Moore’s law approaches is driving research into nanotechnology. These novel devices have significantly different properties than traditional MOS devices and require new design methodologies, which in turn provide exciting architectural opportunities. The H-memory is a design developed for a particular nanotechnology, quantum-dot cellular automata. We propose a new execution model that merges with the H-memory to exploit the characteristics of this nanotechnology by distributing the functionality of the CPU throughout the memory structure.

• Type: Conference
• Year: 2003
• Where: ISVLSI
• Authors: Sarah E. Frost, Arun Rodrigues, Charles A. Giefer, Peter M. Kogge
• Keywords: ISVLSI 2003, Low Power Computers, Quantum-dot Cellular Automata, Traditional Mos Devices