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HICSS
1997
IEEE

Building the 4 Processor SB-PRAM Prototype

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Building the 4 Processor SB-PRAM Prototype
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The main ideas of the design are multithreading on instruction level, hashing of the address space, and combining in the butterfly network. We have built a first research prototype with 4 physical processors, thus 128 virtual processors, to demonstrate the feasibility of the concept. The programming environment consists of a FORK compiler for specifying PRAM programs, an extended C compiler, and the P4 library. The machine runs a parallel operating system which provides program execution and I/O system calls. The SB-PRAM allows for efficient programs with predictable performance. Some examples are presented. The 4 processor prototype is the first step towards a 128 processor machine for which we are adapting the existing hardware.
Peter Bach, Michael Braun, Arno Formella, Jör
Added 06 Aug 2010
Updated 06 Aug 2010
Type Conference
Year 1997
Where HICSS
Authors Peter Bach, Michael Braun, Arno Formella, Jörg Friedrich, Thomas Grün, Cédric Lichtenau
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