A cellular-automaton-type image extraction algorithm and its implementation using an FPGA

This paper proposes a new region extraction algorithm based on cellular automaton operation, which only utilizes the region boundary information of the image. A simple pixel circuit for pixel-parallel operation is also proposed. Logic simulation results of using Verilog-HDL indicate that the proposed algorithm is about 100 times faster than the serial labeling processing for 100¢100-pixel images. An experimental result for a 30¢30-pixel image using an FPGA chip demonstrates that all regions are successfully extracted one by one within 6 µsec with a clock frequency of 25 MHz.

• Type: Conference
• Year: 2002
• Where: APCCAS
• Authors: Teppei Nakano, Takashi Morie, Makoto Nagata, Atsushi Iwata
• Keywords: APCCAS 2002, Cellular Automaton Operation, Hardware, Region Boundary Information, Region Extraction Algorithm