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SBACPAD
2005
IEEE

Chained In-Order/Out-of-Order DoubleCore Architecture

14 years 6 months ago
Chained In-Order/Out-of-Order DoubleCore Architecture
Complexity is one of the most important problems facing microarchitects. It is exacerbated by the application of optimizations, by scaling to higher issue widths and, in general, by increasing the size of microprocessor structures. This paper presents a new microarchitecture, the Chained In–Order/Out–of–Order DoubleCore Architecture (CIO2), designed to attack the problems of complexity and energy. The CIO2 architecture reorganizes the microarchitecture using the concepts of a centralized register file and the Future File. The resulting architecture decouples that program state from the execution units. The simplicity of the architecture enables the implementation of three optimizations with little effort: register file banking, writeback filtering and instruction pre–execution. These optimizations allow a reduction of up to 75% in register file energy consumption. Instruction pre–execution further allows around 40% of all integer instructions to execute in the in–order...
Miquel Pericàs, Adrián Cristal, Rube
Added 25 Jun 2010
Updated 25 Jun 2010
Type Conference
Year 2005
Where sbacpad
Authors Miquel Pericàs, Adrián Cristal, Ruben Gonzalez, Daniel A. Jiménez
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