Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement

Negative bias temperature instability (NBTI) in MOSFETs is one of the major reliability challenges in nano-scale technology. This paper presents an efficient technique to characterize and estimate the lifetime circuit reliability under NBTI degradation. Unlike conventional approaches, where a representative fMAX (maximum operating frequency) measurement from timing critical circuitry is used, we propose to utilize the standby circuit leakage IDDQ as a metric to detect and characterize temporal NBTI degradation in digital circuits. Compared to the fMAX based approach, the proposed IDDQ based technique benefits from lower test cost and improved capability of estimating reliability of complex circuitries such as ALUs and SRAM arrays. We have derived an analytical expression for circuit IDDQ from the analytical PMOS Vt degradation model (Vt t1/6). The proposed model is verified with measurement data obtained from a test chip fabricated in 130nm technology. Furthermore, we examine the pos...

• Type: Conference
• Year: 2007
• Where: DAC
• Authors: Kunhyuk Kang, Kee-Jong Kim, Ahmad E. Islam, Muhammad Ashraful Alam, Kaushik Roy
• Keywords: DAC 2007, Design Automation, Lifetime Circuit Reliability, Reliability Keywords Reliability, Term Circuit Reliability