Chico: An On-chip Hardware Checker for Pipeline Control Logic

The widening gap between CPU complexity and verification capability is becoming increasingly more salient. It is impossible to completely verify the functionality of a modern microprocessor before shipping, much less before tape out. Recent studies indicate that the majority of errors in these designs are centered on control and forwarding logic[9]. To address this problem, we present Chico, an efficient approach to on-chip hardware correctness that specifically targets escaped design errors in these high risk functional blocks. Our solution includes an on-chip checker block that monitors the correctness of potential data dependencies and program order of the executed instructions before they are allowed to commit. If this online checker detects a mismatch, the processor’s exception handler is invoked, reconfiguring the system to a known-correct, formally-verified mode of operation which can correctly re-execute and commit the faulty instruction. The processor can then resume it...

• Type: Conference
• Year: 2007
• Where: MTV
• Authors: Andrew DeOrio, Adam Bauserman, Valeria Bertacco
• Keywords: Designs, Hardware, MTV 2007, On-chip Checker Block, On-chip Hardware Correctness