Circuit Bipartitioning Using Genetic Algorithm

Abstract. In this paper, we propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local optimization heuristic which is a modification of Fiduccia-Matheses algorithm. Using well-known benchmarks (including ACM/SIGDA benchmarks), the combination of genetic algorithm and the local heuristic outperformed hMetis [3], a representative circuit partitioning algorithm. The Fiduccian-Matheyses algorithm (FM) [2] is a representative iterative improvement algorithm for a hypergraph partitioning problem. FM improves an initial solution through short-sighted moves based on the gain. Thus, the quality of the FM is not stable. Kim and Moon [4] introduced lock gain as a primary measure for choosing the node to move. It uses the history of search more efficiently. Lock gain showed excellent performance for general graphs. We adapt the lock gain for hypergraphs within the framework of FM. To apply the lock gain t...

• Type: Conference
• Year: 2003
• Where: GECCO
• Authors: Jong-Pil Kim, Byung Ro Moon
• Keywords: Algorithm, GECCO 2003, Lock Gain, Lock Gain Calculation