A Communication Scheduling Algorithm for Multi-FPGA Systems

For multiple FPGA systems, the limited number of I/O pins causes many problems. To solve these problems, efficient communication scheduling among FPGAs is crucial for obtaining high CLB utilization. In this paper, we provide a heuristic for the NP-complete scheduling algorithm. The experimental results show that our algorithm generates excellent communication schedules: more than 90% of the randomly generated problem instances were scheduled with less than 20% overhead compared with an optimal algorithm. The execution time of the scheduling algorithm is two orders of magnitude less than the optimal scheduling algorithm.

• Type: Conference
• Year: 2000
• Where: FCCM
• Authors: Jinwoo Suh, Dong-In Kang, Stephen P. Crago
• Keywords: FCCM 2000, NP-complete Scheduling Algorithm, Optimal Scheduling Algorithm, Scheduling Algorithm, VLSI