Compiling custom instructions onto expression-grained reconfigurable architectures

While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available processors are often limited by the inability to reconfigure the application-specific features after manufacturing. Even though reconfigurable array-based accelerators are available, their performance is often unacceptable, and comes with other disadvantages such as the size of the configuration bitstream. Additionally, compilation support is limited for existing Coarse Grain Reconfigurable Arrays (CGRAs). We propose to target a different reconfigurable fabric, the EGRA (Expression-Grained Reconfigurable Array), to realize custom instructions in a customizable processor. The EGRA is based on arithmetic processing elements that can compute entire subexpressions in a single cycle and can be connected in both combinational or sequential manners. We present here a compilation flow for this architecture, including novel ...

• Type: Conference
• Year: 2008
• Where: CASES
• Authors: Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi
• Keywords: CASES 2008, Customizable Processor, Reconfigurable Array, Reconfigurable Array-based Accelerators, System Software