On Composable System Timing, Task Timing, and WCET Analysis

The complexity of hardware and software architectures used in today's embedded systems make a hierarchical, composable timing analysis impossible. This paper describes the source of this complexity in terms of mechanisms and side effects that determine variations in the timing of single tasks and entire applications. Based on these observations, the paper proposes strategies to reduce the complexity. It shows the positive effects of these strategies on the timing of tasks and on WCET analysis.

• Type: Conference
• Year: 2008
• Where: WCET
• Authors: Peter P. Puschner, Martin Schoeberl
• Keywords: Composable Timing Analysis, Paper Proposes Strategies, Software Engineering, Today's Embedded Systems, WCET 2008