Conditional Scheduling for Embedded Systems using Genetic List Scheduling

One important part of a HW/SW codesign system is the scheduler which is needed in order to determine if a given HW/SW partitioning is suitable for a given application. In this paper, we employ a dataflow model for scheduling a computation including conditional branches on a loosely coupled heterogeneous multiprocessor system. The goal is to minimize the worst-case makespan while satisfying constraints implied by data dependencies and exclusive resource usage. We present a formal model which allows multiple schedule optimizations and a new efficient heuristic approach based on genetic algorithms and list scheduling.

• Type: Conference
• Year: 2000
• Where: ISSS
• Authors: Martin Grajcar
• Keywords: Efficient Heuristic Approach, Hardware, Heterogeneous Multiprocessor System, HW/SW Codesign, ISSS 2000