Decoupling Local Variable Accesses in a Wide-Issue Superscalar Processor

Providing adequate data bandwidth is extremely important for a wide-issue superscalar processor to achieve its full performance potential. Adding a large number of ports to a data cache, however, becomes increasingly inefficient and can add to the hardware complexity significantly. This paper takes an alternative or complementary approach for providing more data bandwidth, called the data-decoupled architecture. The approach, with support from the compiler and/or hardware, partitions the memory stream into two independent streams early in the processor pipeline, and feeds each stream to a separate memory access queue and cache. Under this model, the paper studies the potential of decoupling memory accesses to program's local variables that are allocated on the run-time stack. Using a set of integer and floating-point programs from the SPEC95 benchmark suite, it is shown that local variable accesses constitute a large portion of all the memory references, while their reference spa...

• Type: Conference
• Year: 1999
• Where: ISCA
• Authors: Sangyeun Cho, Pen-Chung Yew, Gyungho Lee
• Keywords: Data Cache, Hardware, ISCA 1999, Local Variable, Local Variable Accesses