Design and power optimization of CMOS RF blocks operating in the moderate inversion region

In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier design tool is presented. This tool shows that it exists an optimum in the power consumption for a given gain. Different technologies are compared, using the proposed tool, regarding its performance in terms of gain and power consumption in the design space ID-gm/ID. The frequency limit of the applied transistor model is discussed and comparisons with simulations using BSIM3v3 are presented. Implementation of a power amplifier and a VCO at 910 MHz in 0.35µm CMOS technology and experimental results are also shown. Categories and Subject Descriptors: B.7.2 [Integrated Circuits]: Design Aids – simulation. General Terms: Design.

• Type: Conference
• Year: 2005
• Where: SBCCI
• Authors: Leonardo Barboni, Rafaella Fiorelli
• Keywords: Amplifier Design Tool, CMOS Circuit Blocks, Power Consumption, SBCCI 2005