We describe a new method for design error diagnosis in digital circuits, that doesn’t use any error model. A diagnostic specific pre-analysis of the circuit extracts a subcircuit suspected to be erroneous. Contrary to other published works, here the necessary re-synthesis of the subcircuit need not be applied to the whole function of an internal signal in terms of primary inputs, but may stop at arbitrary nodes inside the circuit. As the subcircuits to be redesigned are kept as small as possible, the redesign procedure is simple and fast. Experimental data also show the high speed of the diagnostic pre-analysis. TIMA RESEARCH REPORT, 14 JUNE 1999 TIMA-UJF Bat. C de Physique B.P. 53 38041 Grenoble Cedex 9 France