Design of high performance two stage CMOS cascode op-amps with stable biasing

The technique of mirror biasing is introduced and applied to a very high gain two stage CMOS cascode op-amp, in order to desensitize its output voltage to bias variations. Various performance metrics like low frequency common mode and power supply rejection ratios, slew rate and the sensitivity of the systematic offset are substantially improved. The improved performance is theoretically predicted and substantiated through circuit simulations.

• Type: Conference
• Year: 1996
• Where: VLSID
• Authors: Pradip Mandal, V. Visvanathan
• Keywords: Frequency Common Mode, Supply Rejection Ratios, Various Performance Metrics, VLSI, VLSID 1996