On the design of very small transconductance OTAs with reduced input offset

In this paper it will be demonstrated, from the theory and measurements, that series-parallel (SP) mirrors allow building current copiers with copy factors of thousands, without degrading mismatch or noise performance. SP current-division will be then employed to design OTAs ranging from a few pS to a few nS, with up to 1V linear range, consuming in the order of 100nW, and with a reduced area. An integrated 3.3s time-constant integrator will also be presented. One-by-one several design non-idealities will be revised: linearity, offset, noise, leakages; as well as layout techniques. A final analysis concludes that SP-association of transistors allows to build very efficient transconductors, for demanding applications in the field of implantable electronics among others. Categories and Subject Descriptors B.7.1 [Integrated Circuits]: Types and Design Style – Input/output circuits, VLSI. General Terms Design. Keywords Analog design, CMOS, low-power.

• Type: Conference
• Year: 2005
• Where: SBCCI
• Authors: Alfredo Arnaud, Rafaella Fiorelli, Carlos Galup-Montoro
• Keywords: 3.3s Time-constant Integrator, Keywords Analog Design, Noise Performance, SBCCI 2005