In this paper, we develop a mixed-size placement tool, Dragon2005, to solve large scale placement problems effectively. A top-down hierarchical approach based on min-cut partitioning and simulated annealing is used to place very large SoC-style designs containing thousands of macro blocks of various sizes and millions of standard cells. Macro aware partitioning and techniques to properly handle different bin sizes are required, because of the existence of large macro blocks. Our tool is also a congestion and timing aware placement tool. Categories and Subject Descriptors: B.7.2 Integrated Circuits:Design Aids General Terms: Algorithms