Sciweavers

ASAP
2006
IEEE

Dual-Processor Design of Energy Efficient Fault-Tolerant System

14 years 3 months ago
Dual-Processor Design of Energy Efficient Fault-Tolerant System
A popular approach to guarantee fault tolerance in safety-critical applications is to run the application on two processors. A checkpoint is inserted at the completion of the primary copy. If there is no fault, the secondary processor terminates its execution. Otherwise, should the fault occur, the second processor continues and completes the application before its deadline. In this paper, we study the energy efficiency of such dualprocessor system. Specifically, we first derive an optimal static voltage scaling policy for single periodic task. We then extend it to multiple periodic tasks based on worst case execution time (WCET) analysis. Finally, we discuss how to further reduce system's energy consumption at run time by taking advantage of the actual execution time which is less than the WCET. Simulation on real-life benchmark applications shows that our technique can save up to 80% energy while still providing fault tolerance.
Shaoxiong Hua, Pushkin R. Pari, Gang Qu
Added 20 Aug 2010
Updated 20 Aug 2010
Type Conference
Year 2006
Where ASAP
Authors Shaoxiong Hua, Pushkin R. Pari, Gang Qu
Comments (0)