Dynamic Detection of Uniform and Affine Vectors in GPGPU Computations

Abstract. We present a hardware mechanism which dynamically detects uniform and affine vectors used in Graphics Processing Units, to minimize pressure on the register file and reduce power consumption with minimal architectural modifications. A preliminary experimental analysis conducted with a simulator shows that this optimization can benefit up to 34 % of register file reads and 22 % of the computations of GPGPU applications.

• Type: Conference
• Year: 2009
• Where: EUROPAR
• Authors: Sylvain Collange, David Defour, Yao Zhang
• Keywords: Distributed And Parallel Computing, EUROPAR 2009, Minimal Architectural Modifications, Register File, Register File Reads