It is often possible to greatly improve the performance of a hardware system via the use of predictive (speculative) techniques. For example, the performance of out-of-order microprocessors is greatly enhanced by predicting the outcomes of conditional branch instructions. Most hardware predictors are table based (e.g., two-level branch predictors)--maintaining predictive information for each combination of values of a set of features (e.g., a set of previous branch outcomes). Table-based approaches suffer from the fact that the predictor sizes grow exponentially in the number of features considered by the predictor--this severely limits the amount of predictive information that can be effectively utilized by tablebased predictors. For example, most table-based branch predictors use a feature set containing only a small number of recent branch outcomes, despite the fact that other bits of processor state contain predictive information (e.g., register values and target addresses). In th...
Alan Fern, Robert Givan, Babak Falsafi, T. N. Vija