Dynamic workload characterization for power efficient scheduling on CMP systems

Runtime characteristics of individual threads (such as IPC, cache usage, etc.) are a critical factor in making efficient scheduling decisions in modern chip-multiprocessor systems. They provide key insights into how threads interact when they share processor resources, and affect the overall system power and performance efficiency. In this paper, we propose and implement mechanisms and policies for a commercial OS scheduler and load balancer which incorporates thread characteristics, and show that it results in improvements of up to 30% in performance per watt. Categories and Subject Descriptors D.4.1 [Operating Systems]: Scheduling General Terms Design, Experimentation, Performance Keywords Power, Multi-cores, Workload Characterization

• Type: Conference
• Year: 2010
• Where: ISLPED
• Authors: Gaurav Dhiman, Vasileios Kontorinis, Dean M. Tullsen, Tajana Rosing, Eric Saxe, Jonathan Chew
• Keywords: Commercial Os Scheduler, Efficient Scheduling Decisions, Hardware, ISLPED 2010, Modern Chip-multiprocessor Systems