Early experience with a commercial hardware transactional memory implementation

We report on our experience with the hardware transactional memory (HTM) feature of two pre-production revisions of a new commercial multicore processor. Our experience includes a number of promising results using HTM to improve performance in a variety of contexts, and also identifies some ways in which the feature could be improved to make it even better. We give detailed accounts of our experiences, sharing techniques we used to achieve the results we have, as well as describing challenges we faced in doing so.

• Type: Conference
• Year: 2009
• Where: ASPLOS
• Authors: David Dice, Yossi Lev, Mark Moir, Daniel Nussbaum
• Keywords: ASPLOS 2009, Commercial Multicore Processor, Hardware Transactional Memory, Programming Languages