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FCCM
2003
IEEE

Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable

14 years 5 months ago
Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable
Hybrid architectures, which are composed of a conventional processor closely coupled with reconfigurable logic, seem to combine the advantages of both types of hardware. They present some practical difficulties, however. The interface between the processor and the reconfigurable logic is crucial to performance and is often difficult to implement well. Partitioning the application between the processor and logic is a difficult task, typically complicated by entirely different programming models, heterogeneous interfaces to external resources, and incompatible representations of applications. A separate executable must be produced and maintained for each type of hardware. A novel architecture called HASTE (Hybrid Architecture with a Single Transformable Executable) solves many of these difficulties. HASTE allows a single executable to represent an entire application, including portions that run on a reconfigurable fabric and portions that run on a sequential processor. This executable c...
Benjamin A. Levine, Herman Schmit
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Where FCCM
Authors Benjamin A. Levine, Herman Schmit
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