An Embedded Reconfigurable SIMD DSP with Capability of Dimension-Controllable Vector Processing

A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data streams (SIMD) and reconfigurable architecture. Equipped with eight SIMD-controlled 16-bit datapaths which can also be reconfigured as two 32-bit datapaths, the DSP core can process both 16-bit and 32-bit data in parallel, showing high performance, especially in the applications preferring parallel data flow computations, such as image processing. The SIMD scheme is extended with the instant-scalability of datapaths (ISSIMD), which offers the DSP a capability of dimension-controllable vector processing, so that to provide flexibility for different embedded applications. A first prototype in 0.18-µm CMOS technology has been fabricated, which achieves 1GMACS performance at the clock of 125MHz.

• Type: Conference
• Year: 2004
• Where: ICCD
• Authors: Liang Han, Jie Chen, Chaoxian Zhou, Ying Li, Xin Zhang, Zhibi Liu, Xiaoyun Wei, Baofeng Li
• Keywords: DSP Core, Hardware, ICCD 2004, Parallel Data Flow, Parallel Digital Signal