ESIM: A Multimodel Design Error and Fault Simulator for Logic Circuits

ESIM is a simulation tool that integrates logic fault and design error simulation for logic circuits. It targets several design error and fault models, and uses a novel mix of simulation algorithms based on parallel-pattern evaluation, multiple error activation, single fault propagation, and critical path tracing. Several experiments are discussed to demonstrate the power of ESIM.

• Type: Conference
• Year: 2000
• Where: VTS
• Authors: Hussain Al-Asaad, John P. Hayes
• Keywords: Design Error, Design Error Simulation, Hardware, Single Fault Propagation, VTS 2000