Experimental Validation of Parallel Computation Models on the Intel Paragon

Experimental data validating some of the proposed parallel computation models on the Intel Paragon is presented. This architecture is characterized by a large bandwidth and a relatively large startup cost of a message transmission, which makes it extremely important to employ bulk transfers. The models considered are the BSP model, in which it is assumed that all messages have a fixed short size, and the BPRAM, in which block transfers are rewarded.

• Type: Conference
• Year: 1998
• Where: IPPS
• Authors: Ben H. H. Juurlink
• Keywords: Distributed And Parallel Computing, Intel Paragon, IPPS 1998, Large Startup Cost, Parallel Computation Models