Exploiting loop-dependent stream reuse for stream processors

The memory access limits the performance of stream processors. By exploiting the reuse of data held in the Stream Register File (SRF), an on-chip storage, the number of memory accesses can be reduced. In current stream compilers reuse is only attempted for simple stream references, those whose start and end are known. Compiler analysis from outside of stream processors does not directly enable the consideration of other complex stream references. In this paper we propose a transformation to automatically optimize stream programs to exploit the reuse supplied by loop-dependent stream references. The transformation is based on three results: algorithms to recognize the reuse supplied by stream refernew abstract expression called the Stream Reuse Graph (SRG) to depict the reuse and the optimization of the SRG for the transformation. Both the reuse between whole sequences accessed by stream references and that between partial sequences are exploited in the paper. In particular, the proble...

• Type: Conference
• Year: 2008
• Where: IEEEPACT
• Authors: Xuejun Yang, Ying Zhang, Jingling Xue, Ian Rogers, Gen Li, Guibin Wang
• Keywords: Hardware, IEEEPACT 2008, Reuse, Stream, Stream References