An Extrinsic Function-Level Evolvable Hardware Approach

1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic gate in extrinsic EHW allows us to describe behaviour of any multi-input multi-output logic function. The circuit is represented in the form of connections and functionalities of a rectangular array of building blocks. Each building block can implement primitive logic function or any multi-input multioutput logic function de ned in advance. The method has been tested on evolving logic circuits using half adder, full adder and multiplier. The e ectiveness of this approach is investigated for multiple-valued and binary arithmetical functions. For these functions either method appears to be much more e cient than similar approach with two-input one-output cell representation.

• Type: Conference
• Year: 2000
• Where: EUROGP
• Authors: Tatiana Kalganova
• Keywords: Binary Logic Functions, EUROGP 2000, Logic Function, Multi-input Multi-output Logic, Optimization