In this paper, our memory architecture exploration methodology and CAD techniques for network protocol applications are presented. Prototype tools have been implemented, and applied on part of an industrial ATM application to show howour novel approachcan be used toeasily andthoroughly explore the memory organizationsearch space at the system-level. An extended, novel method for signal to memory assignment is proposed which takes into account memory access conflict constraints. The number of conflicts is first optimized by our flow-graph balancing technique. Significant power and area savings were obtained by performing the exploration thoroughlyat each of the degrees of freedom in the global search space.