Fast power loss calculation for digital static CMOS circuits

: In this paper, we present a new dynamic power estimation method that produces accurate power measures at considerably faster run times. The approach uses an enhanced switch-level simulation algorithm that takes into account both short-circuit power and charge-sharing power effects. In benchmarks against a popular commercial power simulation tool, our approach yields power measurements on average within 3% of the commercial solution, while taking between 15 to 20 times less CPU time.

• Type: Conference
• Year: 1997
• Where: DATE
• Authors: Sergey Gavrilov, Alexey Glebov, S. Rusakov, David Blaauw, Larry G. Jones, Gopalakrishnan Vijayan
• Keywords: Accurate Power Measures, Approach Yields Power, DATE 1997, Dynamic Power Estimation, Hardware