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ISCA
2009
IEEE

A fault tolerant, area efficient architecture for Shor's factoring algorithm

14 years 6 months ago
A fault tolerant, area efficient architecture for Shor's factoring algorithm
Mark Whitney, Nemanja Isailovic, Yatish Patel, Joh
Added 24 May 2010
Updated 24 May 2010
Type Conference
Year 2009
Where ISCA
Authors Mark Whitney, Nemanja Isailovic, Yatish Patel, John Kubiatowicz
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