A first-order mechanistic model for architectural vulnerability factor

Soft error reliability has become a first-order design criterion for modern microprocessors. Architectural Vulnerability Factor (AVF) modeling is often used to capture the probability that a radiation-induced fault in a hardware structure will manifest as an error at the program output. AVF estimation requires detailed microarchitectural simulations which are time-consuming and typically present aggregate metrics. Moreover, it requires a large number of simulations to derive insight into the impact of microarchitectural events on AVF. In this work we present a first-order mechanistic analytical model for computing AVF by estimating the occupancy of correct-path state in important microarchitecture structures through inexpensive profiling. We show that the model estimates the AVF for the reorder buffer, issue queue, load and store queue, and functional units in a 4-wide issue machine with a mean absolute error of less than 0.07. The model is constructed from the first principles of...

• Type: Journal
• Year: 2012
• Where: ISCA
• Authors: Arun A. Nair, Stijn Eyerman, Lieven Eeckhout, Lizy Kurian John
• Keywords: Design Criterion, Hardware, Hardware Structure, ISCA 2012, Space Explorations